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march 2009 rev 4 1/22 22 l6221 quad darlington switch features four non-inverting inputs with enable output voltage up to 50 v output current up to 1.8 a very low saturation voltage ttl compatible inputs integral fast recirculation diodes applications the l6221 monolithic quad darlington switch is designed for high current, high voltage switching applications. description each of the four switches is controlled by a logic input and all four are controlled by a common enable input. all inputs are ttl-compatible for direct connection to logic circuits. each switch consists of an open-collector darlington transistor plus a fast diode for switching applications with inductive device loads. the emitters of the four switches are commoned. any number of inputs and outputs of the same device may be paralleled. figure 1. block diagram table 1. device summary order code package e-l6221as power dip e-l6221ad so16+2+2 e-l6221ad013tr so16+2+2 (tape and reel) e-l6221c/cd/cn obsolete product power dip 12+2+2 so16+2+2 www.st.com
contents 2/22 contents 1 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7 mounting instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
thermal data 3/22 1 thermal data table 2. thermal data symbol parameter so20 power dip unit r th j-pins thermal resistance junction-pins max. 17 14 c/w r th j-amb thermal resistance junction-ambient max. 80 80 c/w
pin information 4/22 2 pin information figure 2. pin connections (top views) e-l6221as (power dip) e-l6221ad (so16+2+2)
pin information 5/22 table 3. truth table (1) 1. for each input: h = high level, l = low level enable input power out hh on hloff lxoff table 4. pin description (1) 1. see figure 1: block diagram name function in 1 input to driver 1 in 2 input to driver 2 out 1 output of driver 1 out 2 output of driver 2 clamp a diode clamp to driver 1 and driver 2 in 3 input to driver 3 in 4 input to driver 4 out 3 output of driver 3 out 4 output of driver 4 clamp b diode clamp to driver 3 and driver 4 enable enable input to all drivers v s logic supply voltage gnd common ground
absolute maximum ratings 6/22 3 absolute maximum ratings table 5. absolute maximum ratings symbol parameter value unit v o output voltage 50 v v s logic supply voltage 7 v v in , v en input voltage, enable voltage v s i c continuous collector current (for each channel) 1.8 a i c collector peak current (repetitive, duty cycle = 10% t on = 5 ms) 2.5 a i c collector peak current (non repetitive, t = 10 s) 3.2 a t op operating temperature range (junction) -40 to +150 c t stg storage temperature range -55 to +150 c i sub output substrate current 350 ma p tot total power dissipation at: t pins = 90 c (power dip) t case = 90c (so20) t amb = 70 c (power dip) t amb = 70c (so20) 4.3 3.5 1 1 w w w w
electrical characteristics 7/22 4 electrical characteristics note: refer to the test circuits figure 3 to figure 10 (v s = 5 v, t amb = 25 c unless otherwise specified). table 6. electrical characteristics symbol parameter test condition min. typ. max. unit v s logic supply voltage - 4.5 - 5.5 v i s logic supply current all outputs on, i c = 0.7a - - 20 ma all outputs off - - 20 ma v ce(sus) output sustaining voltage v in = v in l, v en = v en h i c = 100 ma 46 - - v i cex output leakage current v ce = 50v v in = v in l, v en = v en h --1ma v ce(sat) collector emitter saturation voltage (one input on, all others inputs off.) v s = 4.5 v v in = v in h, v en = v en h i c = 0.6 a i c = 1 a i c = 1.8 a - - - - - - 1 1.2 1.6 v v in l, v en l input low voltage - - - 0.8 v i in l, i en l input low current v in = v inl , v en = v enl --- 100 a v in l, v en h input high voltage - 2.0 - - v i in h, i en h input high current v in = v in h, v en = v en h--10 a i r clamp diode leakage current v r = 50 v, v en = v en h v in = v in l - - 100 a v f clamp diode forward voltage i f = 1a i f = 1.8a - - - - 1.6 2.0 v v t d (on) tu r n - o n d e l ay t i m e v p = 5v, r l = 10 --2 s t d (off) turn-off delay time v p = 5v, r l = 10 --5 s i s logic supply current variation v in = 5v, v en = 5v i out = -300 ma for each channe l - - 120 ma
test circuits 8/22 5 test circuits note: pin numbers without parentheses apply to the power dip package. pin numbers in parentheses are not applicable. figure 3. logic supply current figure 4. output sustaining voltage figure 5. output leakage current set v in = 4.5 v, v en = 0.8 v, or v in = 0.8 v, v en = 4.5 v, for i s (all outputs off) s et v in = 2 v, v en = 2 v, for i s (all outputs on)
test circuits 9/22 figure 6. collector-emitter saturation voltage figure 7. logic input characteristics figure 8. clamp-diode leakage current set s 1 , s 2 open, v in , v en = 0.8 v for i in l, i en l set s 1 , s 2 open, v in , v en = 2 v for i in h, i en h set s 1 , s 2 closed, v in , v en = 0.8 v for v in l, v en l set s 1 , s 2 closed, v in , v en = 2 v for v in h, v en h
test circuits 10/22 figure 9. clamp-diode forward voltage figure 10. switching time test circuit figure 11. switching time waveforms
test circuits 11/22 figure 12. allowed peak collector current versus duty cycle for 1, 2, 3 or 4 contemporary working outputs (l6221as) figure 13. collector saturation voltage versus collector current figure 14. free-wheeling diode forward voltage versus diode current
test circuits 12/22 figure 15. collector saturation voltage versus junction temperature at i c = 1 a figure 16. free-wheeling diode forward voltage versus junction temperature at i f = 1 a figure 17. saturation voltage against junction temperature
test circuits 13/22 figure 18. free-wheeling diode forward voltage against junction temperature
application information 14/22 6 application information when inductive loads are driven by the l6221, a zener diode in series with the integral free- wheeling diodes increases the voltage across which energy stored in the load is discharged and therefore speeds the current decay ( figure 19 ). for reliability it is suggested that the zener is chosen so that there are two reasons for this: the zener voltage changes in temperature and current. the instantaneous power must be limited to avoid the reverse second breakdown. figure 19. free-wheeling diode connection when driving inductive loads care must be taken to ensure that the collectors are placed close together to avoid different current partitioning at turn-off. it is suggested to put in parallel channel 1 and 4 and channel 2 and 3 as shown in figure 20 for the similar electrical characteristics of the logic section (turn-on and turn-off delay time) and the power stages (collector saturation voltage, free-wheeling diode forward voltage). v p v z 35 v < +
application information 15/22 figure 20. driver for solenoids up to 3 a figure 21. saturation voltage versus collector current figure 22. l6221as peak collector current versus duty cycle for 1 or 2 paralleled outputs driven
mounting instructions 16/22 7 mounting instructions the r th j-amb of the e-l6221as can be reduced by soldering the gnd pins to a suitable copper area of the printed circuit board ( figure 23 ) or to an external heat sink ( figure 24 ). figure 23. example of pcb copper area used as heat sink figure 24. external heat sink mounting example
mounting instructions 17/22 figure 25 shows the maximum dissipable power p tot and the r th j-amb as a function of the side " " of two equal square copper areas having a thickness of 35 m (1.4 mils). during soldering the pins temperature must not exceed 260 c and the soldering time must not be longer than 12 seconds. the external heat sink or printed circuit copper area must be connected to electrical ground. figure 25. maximum dissipable power and junction-to-ambient thermal resistance versus side " " figure 26. maximum allowable power dissipation versus ambient temperature
package mechanical data 18/22 8 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack? packages, depending on their level of environmental compliance. ecopack? specifications, grade definitions and product status are available at: www.st.com . ecopack? is an st trademark.
package mechanical data 19/22 dim. mm inch min. typ. max. min. typ. max. a1 0.51 0.020 b 0.85 1.40 0.033 0.055 b 0.50 0.020 b1 0.38 0.50 0.015 0.020 d 20.0 0.787 e 8.80 0.346 e 2.54 0.100 e3 17.78 0.700 f 7.10 0.280 i 5.10 0.201 l 3.30 0.130 z 1.27 0.050 powerdip 16 outline and mechanical data power dip 16
package mechanical data 20/22
revision history 21/22 9 revision history table 7. document revision history date revision changes 14-jan-2004 2 released in edocs 19-jan-2009 3 document reformatted. inserted title for figure 19 . removed reference to obsolete product l6221n and the associated package (multiwatt-15). 30-mars-2009 4 obsolete products e-l6221c/cd/cn added in ta bl e 1 .
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